Pacific MicroCHIP Corp. is looking for talented analog, RF and mixed signal IC/ASIC design engineers to work on variety of challenging projects using cutting edge technologies. We offer competitive compensation and a highly professional environment at our office in Culver City, California.
Current Job Openings:
Electrical Engineer

Job Description:

Design, develop, and optimize Analog to Digital (ADC), Digital to Analog (DAC), Phase Locked Loops (PLL), VGA, and band-gap reference circuits. Evaluate the requirements for the necessary circuit and integrate high performance analogs, RF, mixed signals, and large scale digital functional blocks. Analyze and design PLL’s and simulate parameters such as bandwidth, jitter transfer, and jitter generation. Work closely with the analog and digital teams to develop and verify Application-Specific Integrated Circuits (ASIC) specifications and improve the functionality of the fiber-optic and wireless communications, precision instrumentation, and imaging. Apply transistor modeling and circuit noise theory in testing activities to ensure compliance with specifications for ASIC design engineering projects. Test circuits to ensure operational safety, record and analyze results, and propose modifications as necessary. Inspect finished installations and observe operation to ensure conformance to design and equipment specifications. Verify all functions of the circuit design and optimize settings prior to release. Modify circuit prototypes to correct defects. Stay abreast of the latest technological advances and industry trends in ASIC. 

Job Requirements:

The position requires a Master’s degree in Electrical Engineering, Electronics Engineering, or a related field and 2 years of experience in the job offered or in a related position. This may be substituted with a Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field and five years of experience in the job offered or a related position. The position requires skills and knowledge in the Analog IC Schematic Design, IC Layout Design, RF Circuit Design, CMOS and Cadence Virtuoso. The position requires incidental travel- 1% of time, not more than several days, a few times a year.

40 hours/week.
Job Site: Culver City, CA
Email Resume to: Pacific Microchip Corp. at